1. Field of the Invention
The present invention generally relates to an apparatus for testing the functions of a communication apparatus. More particularly, the present invention is concerned with an apparatus that is connected to a network such as a local area network (LAN) capable of transmitting a variable-length packet and tests the functions of a packet switch capable of routing a packet in accordance with a destination address.
2. Description of the Related Art
In a connectionless type network, a sender terminal sends to a receiver terminal a packet (or frame) having transmission data to which a header including a destination address and a source address is added. A network performs a routing control of the received packet in accordance with the destination address included in the packet and transfers the packet to the receiver terminal. A packet switch, which may be used to construct a repeater, a router or a switching hub is connected to the network controls to transfer the packet (or frame) in accordance with the destination address.
The packet switch or the network including the same is tested as follows. Referring to FIG. 1, a testing apparatus (NTD1) 81 on the transmitting side, and a testing apparatus (NTD2) 82 on the receiving side are prepared. A packet switch (TGT) 83 or a network including it is connected to the testing apparatuses 81 and 82 as a testee subject. The testing apparatus 82 sends a packet including test data to the packet switch 83, which transfers the packet to the testing apparatus 82 on the receiving side. The testing apparatus 82 checks whether the packet switch 83 or the network including it has the predetermined functions. For example, the testing apparatus 82 checks the header and test data and counts the number of packets that are received during the unit time. The testing apparatuses 81 and 82 may be accommodated in a single casing.
A test packet transmitting unit, which corresponds to the testing apparatus on the transmitting side, is configured as shown in FIG. 2. The test packet transmitting unit is made up of a processor (CPU) 101, a program memory (PM) 102, a CPU bus 103, a transmit memory 104, a transmit control circuit 105, a MAC (Media Access Control) layer control part (MAC) 106, a physical layer control part (PHY) 107, and a transmit bus (TB) 108.
The processor 101 writes a test packet into the transmit memory 104 in accordance with a program stored in the program memory 102. The test packet includes a header field containing a transmission destination address, a transmission source address, and a data field containing test data. Then, the processor 101 instructs the transmit control circuit 105 to send the test packet. The transmit control circuit 105 reads the test packet including the test data from the transmit memory 104 in response to the instruction from the processor 101. Then, the circuit 105 sends, via the MAC layer control part 106 and the physical layer control part 107, the test data to a packet switch or a network including it in accordance with a format that conforms to the packet switch or network.
Each time the processor 101 reads the test packet from the transmit memory 104 and sends it under the control of the transmit control circuit 105, the processor 101 changes the destination address and the contents of the test data, and writes test data thus changed into the transmit memory 104. Then, the processor 101 instructs the transmit control circuit 105 to send the changed test data. The above operation is repeated so that a plurality of kinds of test packets can be sent out.
A test packet receiving unit, which corresponds to the testing apparatus on the receiving side, is configured as shown in FIG. 3. The test packet receiving unit is made up of a processor (CPU) 111, a program memory (PM) 112, a CPU bus 113, a receive memory (RXM) 114, a receive control circuit 115, a MAC layer control part (MAC) 116, a physical layer control part (PHY) 117, and a receive bus (RB) 118.
The received packet is written into the receive memory 114 via the physical layer control part 117 and the MAC layer control part 116. At this time, the receive control circuit 115 controls to write the packet in the receive memory on the basis of a beginning-of-packet signal and an end-of-packet signal from the MAC layer control part 116. When the writing of the packet is completed, the receive control circuit 115 informs the processor 111 of the end of the writing. Then, the processor 111 performs the predetermined checking process. For example, the processor 111 checks the header field and the test data.
Nowadays, Ethernet versions having bit rates of 100 Mbps, 1 Gpbs and 10 Gbps are practically used to transmit various data at higher speed. Correspondingly, the packet switch is urged to operate at higher speed. A packet switch having a large number of ports is known. There is also known a packet switch capable of performing a packet repeating operation on all the ports at the respective bit rates. This packet switch has the transmitting and receiving functions called full-wire function.
As the personal computers and the Internet come into wide use, a larger number of terminals is connected to the network and a larger amount of various data is transmitted. It is required to evaluate whether the packet switch connected to the network has given performance. It is desired to test the packet switch having the full-wire function while changing any one or ones of the destination address, the source address, the pattern of data, and the packet length.
Therefore, it is required that the testing apparatus that tests the packet switch or the network including it has the function of testing the full-wire function, which may include a path-through/communication confirming function, an overload testing function, a performance measuring function, an ensured band testing function, and a long-term running test function.
However, the conventional testing apparatus has the following disadvantages. In the test packet transmitting part shown in FIG. 2, the destination address and test data are written into the transmit memory 104, and are read therefrom under the control of the transmit control circuit 105. If a single packet having a pattern is repeatedly read from the transmit memory 104 and is sent, the packets will be transmitted at a relatively high speed. However, in contrast, if the protocol header or the test data is updated each time the packet is sent, the contents of the transmit memory 104 must be rewritten. For example, the Giga-bit Ethernet requires the rewriting process that should be completed for a limited time of about 96 ns, which separates one packet from another. However, there is no means for performing such high-speed rewriting. Even if such means is realized, it will be very expensive. Consequently, it can be said that the conventional testing device cannot perform the overload test and the ensured-band test of the packet switch with the full-wire function.
The test packet receiving part shown in FIG. 3 has the following disadvantages. The received packet is once written into the receive memory 114. Then, it is checked whether the packet in the receive memory 114 has normally been received and is checked whether the test data is normal. In the Giga-bit Ethernet, it is required that packets each having the minimum packet length of 64 bytes (including the frame check sequence) are received in the full-wire fashion, each packet must be written into and read from the receive memory 114 and must be checked by the processor 111 for a limited time approximately equal to 600 ns per packet. In practice, it is very difficult to perform the above process for the limited time. Therefore, the conventional testing apparatus is capable of testing the packet switch only when it has a relatively light load.
As described above, the conventional apparatus for testing the packet switch can test only the test of transmitting packets at a relatively low bit rate. Generally, the conventional testing device is equipped with the function of checking whether the number of transmitted packets is equal to the number of received packets. At low bit rates, the conventional testing apparatus may perform test data normality check. In short, the conventional testing apparatus cannot sufficiently test high-bit-rate packet switches and networks including these switches.
Generally, the packet switch that is actually connected to a network has the function of sending out a special packet at given intervals to a terminal or another switch connected to the network at given intervals in order to conform the normality of the terminal or another switch. This requires that the testing apparatus has the same function as described above. However, the conventional testing apparatus is not equipped with the function of sending the special packet because it does not have the function of checking the maximum transmission band of the packet switch for high-bit-rate transmission.